Overview of DHRUV64
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Developer: Developed by the Centre for Development of Advanced Computing (C-DAC) under the Ministry of Electronics and Information Technology’s (MeitY) Microprocessor Development Programme (MDP).
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Purpose: Part of the Digital India RISC-V (DIR-V) initiative, aiming to create a portfolio of indigenous processors for industrial, military, and consumer technologies.
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Strategic Importance: Aims to achieve technological sovereignty and resilience against supply shocks or export controls by controlling design and toolchains.
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Architecture: A 64-bit, dual-core processor based on the open-source RISC-V instruction set.
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Clock Speed: Runs at 1 GHz, making it fast enough for modern operating systems and contemporary software.
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Primary Applications: Targeted at telecom subsystems, automotive modules, industrial controllers, routers, and 5G infrastructure—fields that prioritize reliability over raw peak performance.
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Competitive Context: While a breakthrough for India, its performance remains lower than top-tier consumer chips (which feature higher speeds, more cores, and integrated GPUs/AI accelerators).
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SHAKTI: Developed by IIT Madras; focuses on general-purpose CPUs and secure computing.
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AJIT: Developed by IIT Bombay; intended for low-cost, low-power industrial and educational use.
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VIKRAM: Engineered by ISRO and the Semiconductor Laboratory (SCL) for space missions and strategic guidance.
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THEJAS64: A previous 64-bit processor from C-DAC fabricated at SCL Mohali.
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Fabrication Details: MeitY has not disclosed where the DHRUV64 was manufactured, raising questions about the supply chain and foundry reliance.
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Benchmarking: There is a lack of specific data regarding cache sizes, memory controllers, input/output capabilities, and performance-per-watt metrics.
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Deployment Readiness: Information is missing regarding Original Equipment Manufacturer (OEM) timelines, supported operating systems, and specific security audit mechanisms.
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Indigeneity Definition: It remains unclear if "fully indigenous" refers to the instruction set, microarchitecture, fabrication, or ownership of all critical IP blocks.
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Next-Gen Chips: Upcoming processors include DHANUSH (1.2-GHz quad-core, 28 nm node) and DHANUSH+ (2-GHz quad-core, 14 or 16 nm node).
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"Chips to Startup" Programme: A ₹250 crore scheme over five years for training, innovation, and infrastructure access.
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Design Linked Incentive (DLI): Financial support for domestic firms to scale chip design and commercialization.
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INUP-i2i: An initiative providing access to advanced nanofabrication facilities for researchers and startups.
Technical Specifications and PerformanceIndia’s Indigenous Processor EcosystemKey Unknowns and ConcernsFuture Roadmap and Government Support